The AMD-owned Xilinx posted a new patch series today implementing a new DRM display driver for supporting their soft MIPI DSI Tx subsystem IP.
This display driver is for use with Xilinx FPGA platforms for soft display purposes from an XI-4 stream interface with programmable DSI subsystem controller.
The Xilinx MIPI DSI Tx Subsystem soft IP is used to display video data from AXI-4 stream interface. It supports upto 4 lanes, optional register interface for the DPHY and multiple RGB color formats. This is a MIPI-DSI host driver and provides DSI bus for panels. This driver also helps to communicate with its panel using panel framework.
The Xilinx DSI Tx subsystem makes use of the MIPI protocol and the D-PHY physical layer provides a direct connection to display peripherals.
Those interested in this new open-source DRM driver that is aiming to ultimately be included in the mainline Linux kernel can find the initial patch series now awaiting review.
Source: https://www.phoronix.com/scan.php?page=news_item&px=Xilinx-2022-DRM-Driver
